13 Oct
Tessolve Semiconductor
Secunderabad
Job Description
Education: B.Tech/M.Tech To be successful in this role you will: Seeking highly motivated, energetic, team-oriented Individual contributors willing to take the challenge of delivering of complex IPs using the latest advance Design for Test skills and Tools . Technical Skillset Required: Good knowledge in DFT Skills Sound knowledge in DFT Architecture and hands on in Scan , ATPG , Simulation & GLS . Prior experience in Synsopsys or Cadence or Mentor tools Like Tetramax, Modus ,Tessent and DC tools Hands on in MBIST insertion and simulation Knowledge on JTAG is an added advantage .
Good Simulation debugging skills Technical Documentation: uArchitecture Specification, SoC Integration Specification Good exposure to Scripting skills like Perl or Python or Shell or TCL .
▶️ DFT -Sr. Design Lead
🖊️ Tessolve Semiconductor
📍 Secunderabad