23 Oct
Mulya Technologies
Mangalore
Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad
Staff IP Design Engineer: 2 Positions
A US based well-funded product based startup looking for talented ASIC / RTL / Logic Design Engineers.
Responsibilities
- Creating micro-architecture and detailed design documents for design keeping in mind performance, power, area requirements.
- Perform RTL coding for complex design blocks in Verilog.
- Function/performance simulation check and debug.
- Understanding on Lint/CDC/Synthesis checks, power analysis and LEC check.
- Understanding and defining constraints.
- Issue and track bug reports from beginning to closure.
- Work with the team to deliver quality designs.
- Work very closely with verification and back-end team.
Key Qualifications
- B.E/M. Tech with 7+ years of experience in ASIC RTL development.
- Solid experience with System Verilog.
- Experience with Lint, CDC.
Contact:
Uday
Mulya Technologies
"Mining The Knowledge Community"
▶️ Staff IP Design Engineer ( Hyderabad )
🖊️ Mulya Technologies
📍 Mangalore